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/ Monster Media 1996 #15 / Monster Media Number 15 (Monster Media)(July 1996).ISO / graphics / gtw95268.zip / GTW95268.EXE / STL00016.DA_ / STL00016.DA
Text File  |  1996-05-01  |  113KB  |  3,301 lines
  1. #
  2. #    $Id: stl00016.da@ 2.4 1996/02/20 22:59:41 JIMK Stable $
  3. #
  4. #    Copyright (C) 1995, Diamond Multimedia Systems.
  5. #
  6. #    File:        stl00016.dat
  7. #
  8. #    Purpose:    This file contains the board and mode information for a
  9. #                Stealth 64 Video VRAM: S3 968, 2MB, IBM 526 175Mhz DAC.
  10. #
  11.  
  12. [Objects]
  13. Draweng32=s3x6832.drw
  14. Dac=ibm525.dac
  15. Cursor=ibm525.cur
  16. PixClk=ibm525.clk
  17. Draweng=s3x68.drw
  18.  
  19. [BoardInfo]
  20. bViewports=1
  21. bNewMMIO=1
  22. bTwoPtLine=1
  23. ValidateBAR=YES
  24. SwapVLA30A25=YES
  25.  
  26. [Desktops]
  27. 2048,768,8
  28. 1600,1200,8
  29. 1280,1024,8
  30. 1152,864,16
  31. 1152,864,8
  32. 1024,1536,8
  33. 1024,768,16
  34. 1024,768,8
  35. 800,600,32
  36. 800,600,24
  37. 800,600,16
  38. 800,600,8
  39. 640,480,32
  40. 640,480,24
  41. 640,480,16
  42. 640,480,8
  43.  
  44. [Viewports]
  45. 1600,1200,8,82,66
  46. 1600,1200,8,75,60
  47. 1280,1024,8,95,90
  48. 1280,1024,8,79,75
  49. 1280,1024,8,76,72
  50. 1280,1024,8,64,60
  51. 1152,864,16,82,90
  52. 1152,864,16,71,75
  53. 1152,864,16,64,70
  54. 1152,864,16,56,60
  55. 1152,864,8,82,90
  56. 1152,864,8,71,75
  57. 1152,864,8,64,70
  58. 1152,864,8,56,60
  59. 1024,768,16,96,120
  60. 1024,768,16,81,100
  61. 1024,768,16,64,80
  62. 1024,768,16,60,75
  63. 1024,768,16,58,72
  64. 1024,768,16,56,70
  65. 1024,768,16,48,60
  66. 1024,768,8,96,120
  67. 1024,768,8,81,100
  68. 1024,768,8,64,80
  69. 1024,768,8,60,75
  70. 1024,768,8,58,72
  71. 1024,768,8,56,70
  72. 1024,768,8,48,60
  73. 800,600,32,75,120
  74. 800,600,32,64,100
  75. 800,600,32,56,90
  76. 800,600,32,46,75
  77. 800,600,32,48,72
  78. 800,600,32,37,60
  79. 800,600,32,35,56
  80. 800,600,24,75,120
  81. 800,600,24,64,100
  82. 800,600,24,56,90
  83. 800,600,24,46,75
  84. 800,600,24,48,72
  85. 800,600,24,37,60
  86. 800,600,24,35,56
  87. 800,600,16,75,120
  88. 800,600,16,64,100
  89. 800,600,16,56,90
  90. 800,600,16,46,75
  91. 800,600,16,48,72
  92. 800,600,16,37,60
  93. 800,600,16,35,56
  94. 800,600,8,75,120
  95. 800,600,8,64,100
  96. 800,600,8,56,90
  97. 800,600,8,46,75
  98. 800,600,8,48,72
  99. 800,600,8,37,60
  100. 800,600,8,35,56
  101. 640,480,32,64,120
  102. 640,480,32,52,100
  103. 640,480,32,48,90
  104. 640,480,32,37,75
  105. 640,480,32,37,72
  106. 640,480,32,31,60
  107. 640,480,24,64,120
  108. 640,480,24,52,100
  109. 640,480,24,48,90
  110. 640,480,24,37,75
  111. 640,480,24,37,72
  112. 640,480,24,31,60
  113. 640,480,16,64,120
  114. 640,480,16,52,100
  115. 640,480,16,48,90
  116. 640,480,16,37,75
  117. 640,480,16,37,72
  118. 640,480,16,31,60
  119. 640,480,8,64,120
  120. 640,480,8,52,100
  121. 640,480,8,48,90
  122. 640,480,8,37,75
  123. 640,480,8,37,72
  124. 640,480,8,31,60
  125.  
  126. [TextMode]
  127. CRT, RUN, EXTENDED_BIOS_FLAGS_2, 1
  128. SHELL, I10, 0x0003,  0x0000
  129. CRT, RUN, REG_LOCK_1, 0x48
  130. CRT, RUN, REG_LOCK_2, 0xA0
  131.  
  132. [GraphicsEnable]
  133. CRT, RMW, LAW_CONTROL, 0xEC, 0x13
  134. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x18
  135.  
  136. [GraphicsDisable]
  137. CRT, RMW, LAW_CONTROL, 0xEC, 0x00
  138. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x00
  139.  
  140. [2048,768,8]
  141. # Setting Line Pitch
  142. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  143. CRT,RUN,EXT_MODE,0x00
  144. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  145. # Setting Engine Pitch
  146. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  147. CRT,RUN,MEM_CONFIG,0x8f
  148. # Setting Basic Mode Registers.The registers
  149. # below are neither Desktop or Viewport Regs
  150. # Unlock Sequencer
  151. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  152. # Dump Sequencer Registers
  153. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  154. # Dump Graphics Controller Registers
  155. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  156. # Dump Attribute Controller Registers
  157. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  158. # Lock Sequencer
  159. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  160. DAC_IDR, RUN, DAC_OPERATION, 0x02
  161. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  162. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  163. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  164. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  165. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  166. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  167. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  168. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  169. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  170.  
  171. [1024,1536,8]
  172. # Setting Line Pitch
  173. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  174. CRT,RUN,EXT_MODE,0x00
  175. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  176. # Setting Engine Pitch
  177. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  178. CRT,RUN,MEM_CONFIG,0x09
  179. # Setting Basic Mode Registers.The registers
  180. # below are neither Desktop or Viewport Regs
  181. # Unlock Sequencer
  182. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  183. # Dump Sequencer Registers
  184. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  185. # Dump Graphics Controller Registers
  186. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  187. # Dump Attribute Controller Registers
  188. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  189. # Lock Sequencer
  190. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  191. DAC_IDR, RUN, DAC_OPERATION, 0x02
  192. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  193. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  194. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  195. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  196. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  197. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  198. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  199. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  200. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  201.  
  202. [1600,1200,8]
  203. # Setting Line Pitch
  204. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  205. CRT,RUN,EXT_MODE,0x00
  206. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  207. # Setting Engine Pitch
  208. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x81
  209. CRT,RUN,MEM_CONFIG,0x8b
  210. # Setting Basic Mode Registers.The registers
  211. # below are neither Desktop or Viewport Regs
  212. # Unlock Sequencer
  213. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  214. # Dump Sequencer Registers
  215. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  216. # Dump Graphics Controller Registers
  217. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  218. # Dump Attribute Controller Registers
  219. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  220. # Lock Sequencer
  221. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  222. DAC_IDR, RUN, DAC_OPERATION, 0x02
  223. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  224. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  225. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  226. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  227. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  228. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  229. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  230. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  231. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  232.  
  233. [1280,1024,8]
  234. # Setting Line Pitch
  235. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  236. CRT,RUN,EXT_MODE,0x00
  237. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  238. # Setting Engine Pitch
  239. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xc0
  240. CRT,RUN,MEM_CONFIG,0x0b
  241. # Setting Basic Mode Registers.The registers
  242. # below are neither Desktop or Viewport Regs
  243. # Unlock Sequencer
  244. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  245. # Dump Sequencer Registers
  246. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  247. # Dump Graphics Controller Registers
  248. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  249. # Dump Attribute Controller Registers
  250. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  251. # Lock Sequencer
  252. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  253. DAC_IDR, RUN, DAC_OPERATION, 0x02
  254. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  255. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  256. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  257. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  258. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  259. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  260. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  261. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  262. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  263.  
  264. [1152,864,16]
  265. # Setting Line Pitch
  266. CRT,RUN,LOGICAL_LINE_LENGTH,0x20
  267. CRT,RUN,EXT_MODE,0x00
  268. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  269. # Setting Engine Pitch
  270. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x11
  271. CRT,RUN,MEM_CONFIG,0x89
  272. # Setting Basic Mode Registers.The registers
  273. # below are neither Desktop or Viewport Regs
  274. # Unlock Sequencer
  275. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  276. # Dump Sequencer Registers
  277. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  278. # Dump Graphics Controller Registers
  279. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  280. # Dump Attribute Controller Registers
  281. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  282. # Lock Sequencer
  283. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  284. DAC_IDR, RUN, DAC_OPERATION, 0x02
  285. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  286. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  287. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  288. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  289. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  290. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  291. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  292. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  293. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  294.  
  295. [1152,864,8]
  296. # Setting Line Pitch
  297. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  298. CRT,RUN,EXT_MODE,0x00
  299. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  300. # Setting Engine Pitch
  301. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x01
  302. CRT,RUN,MEM_CONFIG,0x89
  303. # Setting Basic Mode Registers.The registers
  304. # below are neither Desktop or Viewport Regs
  305. # Unlock Sequencer
  306. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  307. # Dump Sequencer Registers
  308. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  309. # Dump Graphics Controller Registers
  310. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  311. # Dump Attribute Controller Registers
  312. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  313. # Lock Sequencer
  314. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  315. DAC_IDR, RUN, DAC_OPERATION, 0x02
  316. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  317. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  318. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  319. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  320. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  321. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  322. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  323. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  324. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  325.  
  326. [1024,768,16]
  327. # Setting Line Pitch
  328. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  329. CRT,RUN,EXT_MODE,0x00
  330. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  331. # Setting Engine Pitch
  332. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x10
  333. CRT,RUN,MEM_CONFIG,0x89
  334. # Setting Basic Mode Registers.The registers
  335. # below are neither Desktop or Viewport Regs
  336. # Unlock Sequencer
  337. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  338. # Dump Sequencer Registers
  339. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  340. # Dump Graphics Controller Registers
  341. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  342. # Dump Attribute Controller Registers
  343. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  344. # Lock Sequencer
  345. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  346. DAC_IDR, RUN, DAC_OPERATION, 0x02
  347. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  348. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  349. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  350. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  351. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  352. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  353. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  354. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  355. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  356.  
  357. [1024,768,8]
  358. # Setting Line Pitch
  359. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  360. CRT,RUN,EXT_MODE,0x00
  361. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  362. # Setting Engine Pitch
  363. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  364. CRT,RUN,MEM_CONFIG,0x09
  365. # Setting Basic Mode Registers.The registers
  366. # below are neither Desktop or Viewport Regs
  367. # Unlock Sequencer
  368. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  369. # Dump Sequencer Registers
  370. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  371. # Dump Graphics Controller Registers
  372. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  373. # Dump Attribute Controller Registers
  374. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  375. # Lock Sequencer
  376. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  377. DAC_IDR, RUN, DAC_OPERATION, 0x02
  378. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  379. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  380. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  381. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  382. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  383. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  384. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  385. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  386. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  387.  
  388. [800,600,32]
  389. # Setting Line Pitch
  390. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  391. CRT,RUN,EXT_MODE,0x00
  392. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  393. # Setting Engine Pitch
  394. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xb0
  395. CRT,RUN,MEM_CONFIG,0x89
  396. # Setting Basic Mode Registers.The registers
  397. # below are neither Desktop or Viewport Regs
  398. # Unlock Sequencer
  399. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  400. # Dump Sequencer Registers
  401. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  402. # Dump Graphics Controller Registers
  403. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  404. # Dump Attribute Controller Registers
  405. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  406. # Lock Sequencer
  407. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  408. DAC_IDR, RUN, DAC_OPERATION, 0x02
  409. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  410. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  411. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  412. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  413. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  414. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  415. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  416. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  417. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  418.  
  419. [800,600,24]
  420. # Setting Line Pitch
  421. CRT,RUN,LOGICAL_LINE_LENGTH,0x2c
  422. CRT,RUN,EXT_MODE,0x00
  423. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  424. # Setting Engine Pitch
  425. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xa0
  426. CRT,RUN,MEM_CONFIG,0x8b
  427. # Setting Basic Mode Registers.The registers
  428. # below are neither Desktop or Viewport Regs
  429. # Unlock Sequencer
  430. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  431. # Dump Sequencer Registers
  432. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  433. # Dump Graphics Controller Registers
  434. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  435. # Dump Attribute Controller Registers
  436. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  437. # Lock Sequencer
  438. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  439. DAC_IDR, RUN, DAC_OPERATION, 0x02
  440. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  441. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  442. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  443. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  444. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  445. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  446. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  447. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  448. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  449.  
  450.  
  451. [800,600,16]
  452. # Setting Line Pitch
  453. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  454. CRT,RUN,EXT_MODE,0x00
  455. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  456. # Setting Engine Pitch
  457. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x90
  458. CRT,RUN,MEM_CONFIG,0x89
  459. # Setting Basic Mode Registers.The registers
  460. # below are neither Desktop or Viewport Regs
  461. # Unlock Sequencer
  462. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  463. # Dump Sequencer Registers
  464. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  465. # Dump Graphics Controller Registers
  466. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  467. # Dump Attribute Controller Registers
  468. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  469. # Lock Sequencer
  470. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  471. DAC_IDR, RUN, DAC_OPERATION, 0x02
  472. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  473. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  474. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  475. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  476. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  477. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  478. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  479. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  480. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  481.  
  482. [800,600,8]
  483. # Setting Line Pitch
  484. CRT,RUN,LOGICAL_LINE_LENGTH,0x64
  485. CRT,RUN,EXT_MODE,0x00
  486. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  487. # Setting Engine Pitch
  488. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x80
  489. CRT,RUN,MEM_CONFIG,0x89
  490. # Setting Basic Mode Registers.The registers
  491. # below are neither Desktop or Viewport Regs
  492. # Unlock Sequencer
  493. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  494. # Dump Sequencer Registers
  495. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  496. # Dump Graphics Controller Registers
  497. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  498. # Dump Attribute Controller Registers
  499. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  500. # Lock Sequencer
  501. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  502. DAC_IDR, RUN, DAC_OPERATION, 0x02
  503. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  504. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  505. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  506. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  507. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  508. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  509. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  510. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  511. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  512.  
  513. [640,480,32]
  514. # Setting Line Pitch
  515. CRT,RUN,LOGICAL_LINE_LENGTH,0x40
  516. CRT,RUN,EXT_MODE,0x00
  517. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  518. # Setting Engine Pitch
  519. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x70
  520. CRT,RUN,MEM_CONFIG,0x89
  521. # Setting Basic Mode Registers.The registers
  522. # below are neither Desktop or Viewport Regs
  523. # Unlock Sequencer
  524. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  525. # Dump Sequencer Registers
  526. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  527. # Dump Graphics Controller Registers
  528. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  529. # Dump Attribute Controller Registers
  530. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  531. # Lock Sequencer
  532. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  533. DAC_IDR, RUN, DAC_OPERATION, 0x02
  534. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  535. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  536. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  537. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  538. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  539. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  540. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  541. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  542. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  543.  
  544. [640,480,24]
  545. # Setting Line Pitch
  546. CRT,RUN,LOGICAL_LINE_LENGTH,0xf0
  547. CRT,RUN,EXT_MODE,0x00
  548. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  549. # Setting Engine Pitch
  550. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x60
  551. CRT,RUN,MEM_CONFIG,0x8b
  552. # Setting Basic Mode Registers.The registers
  553. # below are neither Desktop or Viewport Regs
  554. # Unlock Sequencer
  555. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  556. # Dump Sequencer Registers
  557. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  558. # Dump Graphics Controller Registers
  559. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  560. # Dump Attribute Controller Registers
  561. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  562. # Lock Sequencer
  563. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  564. DAC_IDR, RUN, DAC_OPERATION, 0x02
  565. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  566. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  567. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  568. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  569. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  570. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  571. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  572. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  573. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  574.  
  575.  
  576. [640,480,16]
  577. # Setting Line Pitch
  578. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  579. CRT,RUN,EXT_MODE,0x00
  580. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  581. # Setting Engine Pitch
  582. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x50
  583. CRT,RUN,MEM_CONFIG,0x89
  584. # Setting Basic Mode Registers.The registers
  585. # below are neither Desktop or Viewport Regs
  586. # Unlock Sequencer
  587. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  588. # Dump Sequencer Registers
  589. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  590. # Dump Graphics Controller Registers
  591. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  592. # Dump Attribute Controller Registers
  593. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  594. # Lock Sequencer
  595. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  596. DAC_IDR, RUN, DAC_OPERATION, 0x02
  597. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  598. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  599. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  600. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  601. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  602. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  603. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  604. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  605. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  606.  
  607. [640,480,8]
  608. # Setting Line Pitch
  609. CRT,RUN,LOGICAL_LINE_LENGTH,0x50
  610. CRT,RUN,EXT_MODE,0x00
  611. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  612. # Setting Engine Pitch
  613. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x40
  614. CRT,RUN,MEM_CONFIG,0x89
  615. # Setting Basic Mode Registers.The registers
  616. # below are neither Desktop or Viewport Regs
  617. # Unlock Sequencer
  618. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  619. # Dump Sequencer Registers
  620. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  621. # Dump Graphics Controller Registers
  622. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  623. # Dump Attribute Controller Registers
  624. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  625. # Lock Sequencer
  626. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  627. DAC_IDR, RUN, DAC_OPERATION, 0x02
  628. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  629. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  630. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  631. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  632. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  633. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  634. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  635. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  636. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  637.  
  638. [1600,1200,8,82,66]
  639. # Unlock CRTC
  640. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  641. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  642. CRT,RUN,REG_LOCK_1,0x48,0xa5
  643. # Dump CRT Controller Registers
  644. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x11,0xe6,0x00,0x00,0x40
  645. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  646. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  647. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  648. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  649. CRT,RUN,MISC_1,0x15,0x78,0x14,0x11
  650. CRT,RUN,MODE_CONTROL,0x02
  651. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  652. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  653. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  654. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  655. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  656. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  657. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  658. # Lock CRTC Reg 11 for compatibility
  659. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  660. # Dump ENG Register
  661. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  662. # Dump MISCOUT Register
  663. DIR,RUN,MISC_WRITE,0xef
  664. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  665. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  666. CLK_IND, RUN, FREQ_2, 0xd3
  667. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  668. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  669. CRT,RUN,LATCH_DATA, 0x08
  670.  
  671. [1600,1200,8,75,60]
  672. # Unlock CRTC
  673. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  674. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  675. CRT,RUN,REG_LOCK_1,0x48,0xa5
  676. # Dump CRT Controller Registers
  677. CRT,RUN,HORZ_TOTAL,0x7f,0x64,0x62,0x02,0x68,0x12,0xe8,0x00,0x00,0x40
  678. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  679. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  680. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  681. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  682. CRT,RUN,MISC_1,0x15,0x77,0x14,0x11
  683. CRT,RUN,MODE_CONTROL,0x02
  684. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  685. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  686. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  687. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  688. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  689. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  690. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  691. # Lock CRTC Reg 11 for compatibility
  692. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  693. # Dump ENG Register
  694. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  695. # Dump MISCOUT Register
  696. DIR,RUN,MISC_WRITE,0xef
  697. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  698. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  699. CLK_IND, RUN, FREQ_2, 0xcd
  700. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  701. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  702. CRT,RUN,LATCH_DATA, 0x08
  703.  
  704. [1280,1024,8,95,90]
  705. # Unlock CRTC
  706. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  707. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  708. CRT,RUN,REG_LOCK_1,0x48,0xa5
  709. # Dump CRT Controller Registers
  710. CRT,RUN,HORZ_TOTAL,0x67,0x4f,0x50,0x8b,0x52,0x9a,0x2a,0x42,0x00,0x40
  711. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  712. CRT,RUN,VERT_RETRACE_START,0x03,0x07,0xff
  713. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2a,0xe3,0xff
  714. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  715. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  716. CRT,RUN,MODE_CONTROL,0x02
  717. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  718. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  719. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  720. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  721. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  722. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  723. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  724. # Lock CRTC Reg 11 for compatibility
  725. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  726. # Dump ENG Register
  727. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  728. # Dump MISCOUT Register
  729. DIR,RUN,MISC_WRITE,0xef
  730. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  731. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  732. CLK_IND, RUN, FREQ_2, 0xd0
  733. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  734. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  735. CRT,RUN,LATCH_DATA, 0x08
  736.  
  737.  
  738. [1280,1024,8,79,75]
  739. # Unlock CRTC
  740. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  741. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  742. CRT,RUN,REG_LOCK_1,0x48,0xa5
  743. # Dump CRT Controller Registers
  744. CRT,RUN,HORZ_TOTAL,0x64,0x4f,0x50,0x89,0x51,0x9a,0x2c,0x42,0x00,0x40
  745. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  746. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  747. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2c,0xe3,0xff
  748. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  749. CRT,RUN,MISC_1,0x15,0x5e,0x14,0x11
  750. CRT,RUN,MODE_CONTROL,0x02
  751. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  752. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  753. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  754. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  755. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  756. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  757. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  758. # Lock CRTC Reg 11 for compatibility
  759. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  760. # Dump ENG Register
  761. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  762. # Dump MISCOUT Register
  763. DIR,RUN,MISC_WRITE,0xef
  764. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  765. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  766. CLK_IND, RUN, FREQ_2, 0xc1
  767. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  768. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  769. CRT,RUN,LATCH_DATA, 0x08
  770.  
  771. [1280,1024,8,76,72]
  772. # Unlock CRTC
  773. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  774. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  775. CRT,RUN,REG_LOCK_1,0x48,0xa5
  776. # Dump CRT Controller Registers
  777. CRT,RUN,HORZ_TOTAL,0x69,0x4f,0x50,0x8c,0x53,0x98,0x27,0x42,0x00,0x40
  778. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  779. CRT,RUN,VERT_RETRACE_START,0x05,0x0c,0xff
  780. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x23,0xe3,0xff
  781. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  782. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  783. CRT,RUN,MODE_CONTROL,0x02
  784. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  785. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  786. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  787. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  788. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  789. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  790. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  791. # Lock CRTC Reg 11 for compatibility
  792. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  793. # Dump ENG Register
  794. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  795. # Dump MISCOUT Register
  796. DIR,RUN,MISC_WRITE,0xef
  797. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  798. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  799. CLK_IND, RUN, FREQ_2, 0xc1
  800. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  801. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  802. CRT,RUN,LATCH_DATA, 0x08
  803.  
  804. [1280,1024,8,64,60]
  805. # Unlock CRTC
  806. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  807. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  808. CRT,RUN,REG_LOCK_1,0x48,0xa5
  809. # Dump CRT Controller Registers
  810. CRT,RUN,HORZ_TOTAL,0x66,0x4f,0x50,0x89,0x53,0x98,0x33,0x42,0x00,0x40
  811. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  812. CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  813. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x28,0xe3,0xff
  814. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  815. CRT,RUN,MISC_1,0x15,0x5f,0x14,0x11
  816. CRT,RUN,MODE_CONTROL,0x02
  817. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  818. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  819. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  820. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  821. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  822. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  823. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  824. # Lock CRTC Reg 11 for compatibility
  825. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  826. # Dump ENG Register
  827. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  828. # Dump MISCOUT Register
  829. DIR,RUN,MISC_WRITE,0xef
  830. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  831. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  832. CLK_IND, RUN, FREQ_2, 0xab
  833. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  834. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  835. CRT,RUN,LATCH_DATA, 0x08
  836.  
  837. [1152,864,8,82,90]
  838. # Unlock CRTC
  839. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  840. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  841. CRT,RUN,REG_LOCK_1,0x48,0xa5
  842. # Dump CRT Controller Registers
  843. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4a,0x0e,0x95,0xff,0x00,0x60
  844. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  845. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  846. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  847. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  848. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  849. CRT,RUN,MODE_CONTROL,0x02
  850. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  851. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  852. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  853. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  854. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  855. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  856. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  857. # Lock CRTC Reg 11 for compatibility
  858. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  859. # Dump ENG Register
  860. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  861. # Dump MISCOUT Register
  862. DIR,RUN,MISC_WRITE,0xef
  863. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  864. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  865. CLK_IND, RUN, FREQ_2, 0xb9
  866. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  867. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  868. CRT,RUN,LATCH_DATA, 0x08
  869.  
  870. [1152,864,8,71,75]
  871. # Unlock CRTC
  872. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  873. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  874. CRT,RUN,REG_LOCK_1,0x48,0xa5
  875. # Dump CRT Controller Registers
  876. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x4b,0x0f,0xb7,0xff,0x00,0x60
  877. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  878. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  879. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  880. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  881. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  882. CRT,RUN,MODE_CONTROL,0x02
  883. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  884. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  885. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  886. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  887. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  888. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  889. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  890. # Lock CRTC Reg 11 for compatibility
  891. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  892. # Dump ENG Register
  893. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  894. # Dump MISCOUT Register
  895. DIR,RUN,MISC_WRITE,0xef
  896. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  897. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  898. CLK_IND, RUN, FREQ_2, 0xa9
  899. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  900. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  901. CRT,RUN,LATCH_DATA, 0x08
  902.  
  903. [1152,864,8,64,70]
  904. # Unlock CRTC
  905. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  906. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  907. CRT,RUN,REG_LOCK_1,0x48,0xa5
  908. # Dump CRT Controller Registers
  909. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4a,0x0f,0x92,0xff,0x00,0x60
  910. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  911. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  912. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  913. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  914. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  915. CRT,RUN,MODE_CONTROL,0x02
  916. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  917. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  918. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  919. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  920. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  921. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  922. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  923. # Lock CRTC Reg 11 for compatibility
  924. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  925. # Dump ENG Register
  926. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  927. # Dump MISCOUT Register
  928. DIR,RUN,MISC_WRITE,0xef
  929. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  930. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  931. CLK_IND, RUN, FREQ_2, 0x9b
  932. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  933. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  934. CRT,RUN,LATCH_DATA, 0x08
  935.  
  936. [1152,864,8,56,60]
  937. # Unlock CRTC
  938. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  939. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  940. CRT,RUN,REG_LOCK_1,0x48,0xa5
  941. # Dump CRT Controller Registers
  942. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x49,0x0d,0xac,0xff,0x00,0x60
  943. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  944. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  945. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  946. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  947. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  948. CRT,RUN,MODE_CONTROL,0x02
  949. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  950. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  951. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  952. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  953. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  954. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  955. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  956. # Lock CRTC Reg 11 for compatibility
  957. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  958. # Dump ENG Register
  959. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  960. # Dump MISCOUT Register
  961. DIR,RUN,MISC_WRITE,0xef
  962. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  963. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  964. CLK_IND, RUN, FREQ_2, 0x90
  965. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  966. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  967. CRT,RUN,LATCH_DATA, 0x08
  968.  
  969.  
  970. [1152,864,16,82,90]
  971. # Unlock CRTC
  972. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  973. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  974. CRT,RUN,REG_LOCK_1,0x48,0xa5
  975. # Dump CRT Controller Registers
  976. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4a,0x0e,0x95,0xff,0x00,0x60
  977. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  978. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  979. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  980. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  981. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  982. CRT,RUN,MODE_CONTROL,0x02
  983. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  984. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  985. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  986. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  987. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  988. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  989. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  990. # Lock CRTC Reg 11 for compatibility
  991. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  992. # Dump ENG Register
  993. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  994. # Dump MISCOUT Register
  995. DIR,RUN,MISC_WRITE,0xef
  996. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  997. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  998. CLK_IND, RUN, FREQ_2, 0xb9
  999. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1000. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1001. CRT,RUN,LATCH_DATA, 0x00
  1002.  
  1003.  
  1004. [1152,864,16,71,75]
  1005. # Unlock CRTC
  1006. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1007. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1008. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1009. # Dump CRT Controller Registers
  1010. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x4b,0x0f,0xb7,0xff,0x00,0x60
  1011. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1012. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  1013. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  1014. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1015. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1016. CRT,RUN,MODE_CONTROL,0x02
  1017. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1018. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1019. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1020. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1021. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1022. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1023. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1024. # Lock CRTC Reg 11 for compatibility
  1025. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1026. # Dump ENG Register
  1027. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1028. # Dump MISCOUT Register
  1029. DIR,RUN,MISC_WRITE,0xef
  1030. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1031. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1032. CLK_IND, RUN, FREQ_2, 0xa9
  1033. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1034. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1035. CRT,RUN,LATCH_DATA, 0x00
  1036.  
  1037.  
  1038. [1152,864,16,64,70]
  1039. # Unlock CRTC
  1040. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1041. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1042. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1043. # Dump CRT Controller Registers
  1044. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4a,0x0f,0x92,0xff,0x00,0x60
  1045. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1046. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1047. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  1048. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1049. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1050. CRT,RUN,MODE_CONTROL,0x02
  1051. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1052. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1053. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1054. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1055. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1056. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1057. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1058. # Lock CRTC Reg 11 for compatibility
  1059. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1060. # Dump ENG Register
  1061. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1062. # Dump MISCOUT Register
  1063. DIR,RUN,MISC_WRITE,0xef
  1064. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1065. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1066. CLK_IND, RUN, FREQ_2, 0x9b
  1067. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1068. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1069. CRT,RUN,LATCH_DATA, 0x00
  1070.  
  1071. [1152,864,16,56,60]
  1072. # Unlock CRTC
  1073. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1074. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1075. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1076. # Dump CRT Controller Registers
  1077. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x49,0x0d,0xac,0xff,0x00,0x60
  1078. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1079. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1080. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1081. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1082. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1083. CRT,RUN,MODE_CONTROL,0x02
  1084. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1085. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1086. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1087. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1088. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1089. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1090. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1091. # Lock CRTC Reg 11 for compatibility
  1092. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1093. # Dump ENG Register
  1094. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1095. # Dump MISCOUT Register
  1096. DIR,RUN,MISC_WRITE,0xef
  1097. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1098. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1099. CLK_IND, RUN, FREQ_2, 0x90
  1100. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1101. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1102. CRT,RUN,LATCH_DATA, 0x00
  1103.  
  1104. [1024,768,16,96,120]
  1105. # Unlock CRTC
  1106. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1107. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1108. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1109. # Dump CRT Controller Registers
  1110. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  1111. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1112. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  1113. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1114. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1115. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  1116. CRT,RUN,MODE_CONTROL,0x02
  1117. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1118. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1119. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1120. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1121. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1122. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1123. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1124. # Lock CRTC Reg 11 for compatibility
  1125. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1126. # Dump ENG Register
  1127. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1128. # Dump MISCOUT Register
  1129. DIR,RUN,MISC_WRITE,0xef
  1130. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1131. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1132. CLK_IND, RUN, FREQ_2, 0xbd
  1133. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1134. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1135. CRT,RUN,LATCH_DATA, 0x00
  1136.  
  1137. [1024,768,16,81,100]
  1138. # Unlock CRTC
  1139. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1140. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1141. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1142. # Dump CRT Controller Registers
  1143. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  1144. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1145. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  1146. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1147. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1148. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  1149. CRT,RUN,MODE_CONTROL,0x02
  1150. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1151. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1152. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1153. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1154. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1155. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1156. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1157. # Lock CRTC Reg 11 for compatibility
  1158. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1159. # Dump ENG Register
  1160. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1161. # Dump MISCOUT Register
  1162. DIR,RUN,MISC_WRITE,0xef
  1163. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1164. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1165. CLK_IND, RUN, FREQ_2, 0xa9
  1166. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1167. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1168. CRT,RUN,LATCH_DATA, 0x00
  1169.  
  1170. [1024,768,16,64,80]
  1171. # Unlock CRTC
  1172. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1173. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1174. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1175. # Dump CRT Controller Registers
  1176. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  1177. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1178. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  1179. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1180. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1181. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  1182. CRT,RUN,MODE_CONTROL,0x02
  1183. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1184. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1185. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1186. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1187. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1188. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1189. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1190. # Lock CRTC Reg 11 for compatibility
  1191. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1192. # Dump ENG Register
  1193. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1194. # Dump MISCOUT Register
  1195. DIR,RUN,MISC_WRITE,0xef
  1196. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1197. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1198. CLK_IND, RUN, FREQ_2, 0x93
  1199. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1200. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1201. CRT,RUN,LATCH_DATA, 0x00
  1202.  
  1203. [1024,768,16,60,75]
  1204. # Unlock CRTC
  1205. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1206. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1207. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1208. # Dump CRT Controller Registers
  1209. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  1210. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1211. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1212. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  1213. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1214. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  1215. CRT,RUN,MODE_CONTROL,0x02
  1216. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1217. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1218. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1219. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1220. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1221. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1222. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1223. # Lock CRTC Reg 11 for compatibility
  1224. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1225. # Dump ENG Register
  1226. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1227. # Dump MISCOUT Register
  1228. DIR,RUN,MISC_WRITE,0xef
  1229. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1230. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1231. CLK_IND, RUN, FREQ_2, 0x8c
  1232. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1233. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1234. CRT,RUN,LATCH_DATA, 0x00
  1235.  
  1236. [1024,768,16,58,72]
  1237. # Unlock CRTC
  1238. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1239. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1240. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1241. # Dump CRT Controller Registers
  1242. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  1243. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1244. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  1245. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  1246. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1247. CRT,RUN,MISC_1,0x15,0x45,0x20,0x11
  1248. CRT,RUN,MODE_CONTROL,0x02
  1249. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1250. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1251. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1252. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1253. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1254. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1255. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1256. # Lock CRTC Reg 11 for compatibility
  1257. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1258. # Dump ENG Register
  1259. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1260. # Dump MISCOUT Register
  1261. DIR,RUN,MISC_WRITE,0xef
  1262. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1263. CLK_IND, RUN, FREQ_2,0x88
  1264. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1265. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1266. CLK_IND, RUN, FREQ_2, 0x88
  1267. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1268. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1269. CRT,RUN,LATCH_DATA, 0x00
  1270.  
  1271. [1024,768,16,56,70]
  1272. # Unlock CRTC
  1273. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1274. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1275. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1276. # Dump CRT Controller Registers
  1277. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1278. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1279. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1280. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1281. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1282. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  1283. CRT,RUN,MODE_CONTROL,0x02
  1284. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1285. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1286. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1287. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1288. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1289. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1290. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1291. # Lock CRTC Reg 11 for compatibility
  1292. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1293. # Dump ENG Register
  1294. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1295. # Dump MISCOUT Register
  1296. DIR,RUN,MISC_WRITE,0xef
  1297. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1298. CLK_IND, RUN, FREQ_2,0x88
  1299. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1300. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1301. CLK_IND, RUN, FREQ_2, 0x88
  1302. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1303. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1304. CRT,RUN,LATCH_DATA, 0x00
  1305.  
  1306. [1024,768,16,48,60]
  1307. # Unlock CRTC
  1308. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1309. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1310. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1311. # Dump CRT Controller Registers
  1312. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1313. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1314. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1315. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1316. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1317. CRT,RUN,MISC_1,0x15,0x48,0x20,0x11
  1318. CRT,RUN,MODE_CONTROL,0x02
  1319. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1320. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1321. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1322. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1323. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1324. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1325. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1326. # Lock CRTC Reg 11 for compatibility
  1327. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1328. # Dump ENG Register
  1329. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1330. # Dump MISCOUT Register
  1331. DIR,RUN,MISC_WRITE,0xef
  1332. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1333. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1334. CLK_IND, RUN, FREQ_2, 0x7E
  1335. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1336. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1337. CRT,RUN,LATCH_DATA, 0x00
  1338.  
  1339. [1024,768,8,96,120]
  1340. # Unlock CRTC
  1341. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1342. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1343. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1344. # Dump CRT Controller Registers
  1345. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  1346. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1347. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  1348. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1349. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1350. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  1351. CRT,RUN,MODE_CONTROL,0x02
  1352. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1353. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1354. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1355. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1356. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1357. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1358. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1359. # Lock CRTC Reg 11 for compatibility
  1360. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1361. # Dump ENG Register
  1362. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1363. # Dump MISCOUT Register
  1364. DIR,RUN,MISC_WRITE,0xef
  1365. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1366. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1367. CLK_IND, RUN, FREQ_2, 0xbd
  1368. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1369. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1370. CRT,RUN,LATCH_DATA, 0x08
  1371.  
  1372. [1024,768,8,81,100]
  1373. # Unlock CRTC
  1374. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1375. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1376. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1377. # Dump CRT Controller Registers
  1378. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  1379. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1380. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  1381. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1382. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1383. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  1384. CRT,RUN,MODE_CONTROL,0x02
  1385. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1386. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1387. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1388. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1389. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1390. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1391. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1392. # Lock CRTC Reg 11 for compatibility
  1393. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1394. # Dump ENG Register
  1395. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1396. # Dump MISCOUT Register
  1397. DIR,RUN,MISC_WRITE,0xef
  1398. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1399. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1400. CLK_IND, RUN, FREQ_2, 0xa9
  1401. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1402. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1403. CRT,RUN,LATCH_DATA, 0x08
  1404.  
  1405.  
  1406. [1024,768,8,64,80]
  1407. # Unlock CRTC
  1408. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1409. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1410. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1411. # Dump CRT Controller Registers
  1412. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  1413. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1414. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  1415. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1416. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1417. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1418. CRT,RUN,MODE_CONTROL,0x02
  1419. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1420. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1421. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1422. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1423. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1424. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1425. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1426. # Lock CRTC Reg 11 for compatibility
  1427. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1428. # Dump ENG Register
  1429. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1430. # Dump MISCOUT Register
  1431. DIR,RUN,MISC_WRITE,0xef
  1432. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1433. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1434. CLK_IND, RUN, FREQ_2, 0x93
  1435. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1436. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1437. CRT,RUN,LATCH_DATA, 0x08
  1438.  
  1439. [1024,768,8,60,75]
  1440. # Unlock CRTC
  1441. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1442. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1443. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1444. # Dump CRT Controller Registers
  1445. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  1446. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1447. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1448. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  1449. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1450. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1451. CRT,RUN,MODE_CONTROL,0x02
  1452. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1453. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1454. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1455. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1456. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1457. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1458. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1459. # Lock CRTC Reg 11 for compatibility
  1460. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1461. # Dump ENG Register
  1462. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1463. # Dump MISCOUT Register
  1464. DIR,RUN,MISC_WRITE,0xef
  1465. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1466. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1467. CLK_IND, RUN, FREQ_2, 0x8c
  1468. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1469. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1470. CRT,RUN,LATCH_DATA, 0x08
  1471.  
  1472. [1024,768,8,58,72]
  1473. # Unlock CRTC
  1474. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1475. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1476. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1477. # Dump CRT Controller Registers
  1478. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  1479. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1480. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  1481. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  1482. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1483. CRT,RUN,MISC_1,0x15,0x45,0x25,0x11
  1484. CRT,RUN,MODE_CONTROL,0x02
  1485. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1486. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1487. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1488. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1489. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1490. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1491. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1492. # Lock CRTC Reg 11 for compatibility
  1493. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1494. # Dump ENG Register
  1495. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1496. # Dump MISCOUT Register
  1497. DIR,RUN,MISC_WRITE,0xef
  1498. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1499. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1500. CLK_IND, RUN, FREQ_2, 0x88
  1501. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1502. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1503. CRT,RUN,LATCH_DATA, 0x08
  1504.  
  1505. [1024,768,8,56,70]
  1506. # Unlock CRTC
  1507. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1508. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1509. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1510. # Dump CRT Controller Registers
  1511. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1512. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1513. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1514. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1515. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1516. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1517. CRT,RUN,MODE_CONTROL,0x02
  1518. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1519. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1520. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1521. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1522. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1523. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1524. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1525. # Lock CRTC Reg 11 for compatibility
  1526. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1527. # Dump ENG Register
  1528. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1529. # Dump MISCOUT Register
  1530. DIR,RUN,MISC_WRITE,0xef
  1531. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1532. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1533. CLK_IND, RUN, FREQ_2, 0x88
  1534. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1535. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1536. CRT,RUN,LATCH_DATA, 0x08
  1537.  
  1538. [1024,768,8,48,60]
  1539. # Unlock CRTC
  1540. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1541. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1542. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1543. # Dump CRT Controller Registers
  1544. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1545. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1546. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1547. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1548. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1549. CRT,RUN,MISC_1,0x15,0x48,0x25,0x11
  1550. CRT,RUN,MODE_CONTROL,0x02
  1551. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1552. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  1553. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1554. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1555. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1556. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1557. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1558. # Lock CRTC Reg 11 for compatibility
  1559. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1560. # Dump ENG Register
  1561. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1562. # Dump MISCOUT Register
  1563. DIR,RUN,MISC_WRITE,0xef
  1564. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1565. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1566. CLK_IND, RUN, FREQ_2, 0x7e
  1567. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1568. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1569. CRT,RUN,LATCH_DATA, 0x08
  1570.  
  1571. [800,600,32,75,120]
  1572. # Unlock CRTC
  1573. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1574. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1575. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1576. # Dump CRT Controller Registers
  1577. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  1578. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1579. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  1580. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1581. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1582. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  1583. CRT,RUN,MODE_CONTROL,0x02
  1584. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1585. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1586. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1587. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1588. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1589. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1590. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1591. # Lock CRTC Reg 11 for compatibility
  1592. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1593. # Dump ENG Register
  1594. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1595. # Dump MISCOUT Register
  1596. DIR,RUN,MISC_WRITE,0xef
  1597. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1598. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1599. CLK_IND, RUN, FREQ_2, 0x8a
  1600. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1601. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1602. CRT,RUN,LATCH_DATA, 0x00
  1603.  
  1604. [800,600,32,64,100]
  1605. # Unlock CRTC
  1606. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1607. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1608. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1609. # Dump CRT Controller Registers
  1610. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  1611. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1612. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  1613. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1614. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1615. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  1616. CRT,RUN,MODE_CONTROL,0x02
  1617. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1618. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1619. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1620. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1621. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1622. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1623. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1624. # Lock CRTC Reg 11 for compatibility
  1625. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1626. # Dump ENG Register
  1627. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1628. # Dump MISCOUT Register
  1629. DIR,RUN,MISC_WRITE,0xef
  1630. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1631. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1632. CLK_IND, RUN, FREQ_2, 0x7e
  1633. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1634. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1635. CRT,RUN,LATCH_DATA, 0x00
  1636.  
  1637. [800,600,32,56,90]
  1638. # Unlock CRTC
  1639. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1640. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1641. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1642. # Dump CRT Controller Registers
  1643. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  1644. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1645. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  1646. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1647. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1648. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  1649. CRT,RUN,MODE_CONTROL,0x02
  1650. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1651. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1652. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1653. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1654. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1655. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1656. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1657. # Lock CRTC Reg 11 for compatibility
  1658. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1659. # Dump ENG Register
  1660. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1661. # Dump MISCOUT Register
  1662. DIR,RUN,MISC_WRITE,0xef
  1663. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1664. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1665. CLK_IND, RUN, FREQ_2, 0x70
  1666. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1667. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1668. CRT,RUN,LATCH_DATA, 0x00
  1669.  
  1670. [800,600,32,46,75]
  1671. # Unlock CRTC
  1672. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1673. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1674. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1675. # Dump CRT Controller Registers
  1676. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  1677. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1678. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  1679. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1680. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1681. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  1682. CRT,RUN,MODE_CONTROL,0x02
  1683. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1684. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1685. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  1686. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1687. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1688. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1689. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1690. # Lock CRTC Reg 11 for compatibility
  1691. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1692. # Dump ENG Register
  1693. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1694. # Dump MISCOUT Register
  1695. DIR,RUN,MISC_WRITE,0xef
  1696. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1697. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1698. CLK_IND, RUN, FREQ_2, 0x60
  1699. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1700. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1701. CRT,RUN,LATCH_DATA, 0x00
  1702.  
  1703. [800,600,32,48,72]
  1704. # Unlock CRTC
  1705. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1706. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1707. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1708. # Dump CRT Controller Registers
  1709. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  1710. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1711. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  1712. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1713. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1714. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  1715. CRT,RUN,MODE_CONTROL,0x02
  1716. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1717. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1718. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1719. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1720. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1721. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1722. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1723. # Lock CRTC Reg 11 for compatibility
  1724. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1725. # Dump ENG Register
  1726. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1727. # Dump MISCOUT Register
  1728. DIR,RUN,MISC_WRITE,0xef
  1729. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1730. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1731. CLK_IND, RUN, FREQ_2, 0x61
  1732. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1733. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1734. CRT,RUN,LATCH_DATA, 0x00
  1735.  
  1736. [800,600,32,37,60]
  1737. # Unlock CRTC
  1738. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1739. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1740. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1741. # Dump CRT Controller Registers
  1742. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  1743. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1744. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  1745. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1746. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1747. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  1748. CRT,RUN,MODE_CONTROL,0x02
  1749. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1750. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1751. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  1752. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1753. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1754. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1755. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1756. # Lock CRTC Reg 11 for compatibility
  1757. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1758. # Dump ENG Register
  1759. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1760. # Dump MISCOUT Register
  1761. DIR,RUN,MISC_WRITE,0xef
  1762. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1763. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1764. CLK_IND, RUN, FREQ_2, 0x4D
  1765. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1766. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1767. CRT,RUN,LATCH_DATA, 0x00
  1768.  
  1769.  
  1770. [800,600,32,35,56]
  1771. # Unlock CRTC
  1772. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1773. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1774. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1775. # Dump CRT Controller Registers
  1776. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  1777. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1778. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  1779. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1780. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1781. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  1782. CRT,RUN,MODE_CONTROL,0x02
  1783. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1784. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1785. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1786. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1787. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1788. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1789. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1790. # Lock CRTC Reg 11 for compatibility
  1791. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1792. # Dump ENG Register
  1793. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1794. # Dump MISCOUT Register
  1795. DIR,RUN,MISC_WRITE,0xef
  1796. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1797. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1798. CLK_IND, RUN, FREQ_2, 0x45
  1799. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1800. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1801. CRT,RUN,LATCH_DATA, 0x00
  1802.  
  1803. [800,600,24,75,120]
  1804. # Unlock CRTC
  1805. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1806. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1807. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1808. # Dump CRT Controller Registers
  1809. CRT,RUN,HORZ_TOTAL,0x58,0x4c,0x4a,0x00,0x4b,0x14,0x82,0xf0,0x00,0x60
  1810. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1811. CRT,RUN,VERT_RETRACE_START,0x59,0x0b,0x57
  1812. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1813. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1814. CRT,RUN,MISC_1,0x15,0x73,0x21,0x11
  1815. CRT,RUN,MODE_CONTROL,0x02
  1816. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1817. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1818. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1819. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1820. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1821. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1822. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1823. # Lock CRTC Reg 11 for compatibility
  1824. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1825. # Dump ENG Register
  1826. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1827. # Dump MISCOUT Register
  1828. DIR,RUN,MISC_WRITE,0xef
  1829. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1830. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1831. CLK_IND, RUN, FREQ_2, 0x8a
  1832. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1833. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1834. CRT,RUN,LATCH_DATA, 0x00
  1835.  
  1836.  
  1837. [800,600,24,64,100]
  1838. # Unlock CRTC
  1839. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1840. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1841. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1842. # Dump CRT Controller Registers
  1843. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4d,0x16,0x7a,0xf0,0x00,0x60
  1844. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1845. CRT,RUN,VERT_RETRACE_START,0x59,0x08,0x57
  1846. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1847. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1848. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  1849. CRT,RUN,MODE_CONTROL,0x02
  1850. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1851. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1852. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1853. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1854. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1855. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1856. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1857. # Lock CRTC Reg 11 for compatibility
  1858. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1859. # Dump ENG Register
  1860. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1861. # Dump MISCOUT Register
  1862. DIR,RUN,MISC_WRITE,0xef
  1863. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1864. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1865. CLK_IND, RUN, FREQ_2, 0x7e
  1866. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1867. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1868. CRT,RUN,LATCH_DATA, 0x00
  1869.  
  1870.  
  1871. [800,600,24,56,90]
  1872. # Unlock CRTC
  1873. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1874. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1875. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1876. # Dump CRT Controller Registers
  1877. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4f,0x1b,0x6f,0xf0,0x00,0x60
  1878. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1879. CRT,RUN,VERT_RETRACE_START,0x57,0x09,0x57
  1880. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1881. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1882. CRT,RUN,MISC_1,0x15,0x55,0x2f,0x11
  1883. CRT,RUN,MODE_CONTROL,0x02
  1884. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1885. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1886. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1887. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1888. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1889. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1890. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1891. # Lock CRTC Reg 11 for compatibility
  1892. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1893. # Dump ENG Register
  1894. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1895. # Dump MISCOUT Register
  1896. DIR,RUN,MISC_WRITE,0xef
  1897. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1898. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1899. CLK_IND, RUN, FREQ_2, 0x70
  1900. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1901. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1902. CRT,RUN,LATCH_DATA, 0x00
  1903.  
  1904.  
  1905. [800,600,24,46,75]
  1906. # Unlock CRTC
  1907. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1908. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1909. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1910. # Dump CRT Controller Registers
  1911. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x52,0x1a,0x6f,0xe0,0x00,0x60
  1912. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1913. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  1914. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1915. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1916. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  1917. CRT,RUN,MODE_CONTROL,0x02
  1918. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1919. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1920. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1921. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1922. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1923. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1924. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1925. # Lock CRTC Reg 11 for compatibility
  1926. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1927. # Dump ENG Register
  1928. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1929. # Dump MISCOUT Register
  1930. DIR,RUN,MISC_WRITE,0xef
  1931. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1932. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1933. CLK_IND, RUN, FREQ_2, 0x60
  1934. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1935. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1936. CRT,RUN,LATCH_DATA, 0x00
  1937.  
  1938.  
  1939. [800,600,24,48,72]
  1940. # Unlock CRTC
  1941. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1942. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1943. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1944. # Dump CRT Controller Registers
  1945. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4f,0x1b,0x8e,0xf0,0x00,0x60
  1946. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1947. CRT,RUN,VERT_RETRACE_START,0x71,0x27,0x57
  1948. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1949. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1950. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  1951. CRT,RUN,MODE_CONTROL,0x02
  1952. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1953. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1954. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1955. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1956. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1957. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1958. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1959. # Lock CRTC Reg 11 for compatibility
  1960. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1961. # Dump ENG Register
  1962. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1963. # Dump MISCOUT Register
  1964. DIR,RUN,MISC_WRITE,0xef
  1965. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1966. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1967. CLK_IND, RUN, FREQ_2, 0x61
  1968. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1969. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1970. CRT,RUN,LATCH_DATA, 0x00
  1971.  
  1972. [800,600,24,37,60]
  1973. # Unlock CRTC
  1974. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1975. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1976. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1977. # Dump CRT Controller Registers
  1978. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4f,0x1b,0x72,0xf0,0x00,0x60
  1979. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1980. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  1981. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1982. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1983. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  1984. CRT,RUN,MODE_CONTROL,0x02
  1985. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1986. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  1987. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1988. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1989. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1990. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1991. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1992. # Lock CRTC Reg 11 for compatibility
  1993. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1994. # Dump ENG Register
  1995. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1996. # Dump MISCOUT Register
  1997. DIR,RUN,MISC_WRITE,0xef
  1998. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1999. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2000. CLK_IND, RUN, FREQ_2, 0x4d
  2001. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2002. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2003. CRT,RUN,LATCH_DATA, 0x00
  2004.  
  2005.  
  2006. [800,600,24,35,56]
  2007. # Unlock CRTC
  2008. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2009. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2010. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2011. # Dump CRT Controller Registers
  2012. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4f,0x18,0x72,0xf0,0x00,0x60
  2013. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2014. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2015. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2016. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2017. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  2018. CRT,RUN,MODE_CONTROL,0x02
  2019. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2020. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2021. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2022. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2023. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2024. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2025. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2026. # Lock CRTC Reg 11 for compatibility
  2027. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2028. # Dump ENG Register
  2029. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2030. # Dump MISCOUT Register
  2031. DIR,RUN,MISC_WRITE,0xef
  2032. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2033. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2034. CLK_IND, RUN, FREQ_2, 0x45
  2035. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2036. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2037. CRT,RUN,LATCH_DATA, 0x00
  2038.  
  2039. [800,600,16,75,120]
  2040. # Unlock CRTC
  2041. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2042. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2043. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2044. # Dump CRT Controller Registers
  2045. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  2046. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2047. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  2048. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2049. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2050. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2051. CRT,RUN,MODE_CONTROL,0x02
  2052. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2053. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2054. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2055. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2056. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2057. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2058. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2059. # Lock CRTC Reg 11 for compatibility
  2060. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2061. # Dump ENG Register
  2062. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2063. # Dump MISCOUT Register
  2064. DIR,RUN,MISC_WRITE,0xef
  2065. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2066. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2067. CLK_IND, RUN, FREQ_2, 0x8a
  2068. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2069. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2070. CRT,RUN,LATCH_DATA, 0x00
  2071.  
  2072. [800,600,16,64,100]
  2073. # Unlock CRTC
  2074. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2075. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2076. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2077. # Dump CRT Controller Registers
  2078. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  2079. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2080. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  2081. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2082. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2083. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  2084. CRT,RUN,MODE_CONTROL,0x02
  2085. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2086. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2087. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2088. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2089. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2090. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2091. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2092. # Lock CRTC Reg 11 for compatibility
  2093. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2094. # Dump ENG Register
  2095. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2096. # Dump MISCOUT Register
  2097. DIR,RUN,MISC_WRITE,0xef
  2098. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2099. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2100. CLK_IND, RUN, FREQ_2, 0x7e
  2101. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2102. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2103. CRT,RUN,LATCH_DATA, 0x00
  2104.  
  2105. [800,600,16,56,90]
  2106. # Unlock CRTC
  2107. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2108. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2109. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2110. # Dump CRT Controller Registers
  2111. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  2112. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2113. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  2114. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2115. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2116. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2117. CRT,RUN,MODE_CONTROL,0x02
  2118. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2119. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2120. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2121. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2122. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2123. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2124. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2125. # Lock CRTC Reg 11 for compatibility
  2126. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2127. # Dump ENG Register
  2128. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2129. # Dump MISCOUT Register
  2130. DIR,RUN,MISC_WRITE,0xef
  2131. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2132. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2133. CLK_IND, RUN, FREQ_2, 0x70
  2134. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2135. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2136. CRT,RUN,LATCH_DATA, 0x00
  2137.  
  2138. [800,600,16,46,75]
  2139. # Unlock CRTC
  2140. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2141. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2142. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2143. # Dump CRT Controller Registers
  2144. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  2145. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2146. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  2147. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2148. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2149. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2150. CRT,RUN,MODE_CONTROL,0x02
  2151. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2152. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2153. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2154. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2155. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2156. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2157. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2158. # Lock CRTC Reg 11 for compatibility
  2159. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2160. # Dump ENG Register
  2161. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2162. # Dump MISCOUT Register
  2163. DIR,RUN,MISC_WRITE,0xef
  2164. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2165. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2166. CLK_IND, RUN, FREQ_2, 0x60
  2167. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2168. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2169. CRT,RUN,LATCH_DATA, 0x00
  2170.  
  2171. [800,600,16,48,72]
  2172. # Unlock CRTC
  2173. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2174. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2175. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2176. # Dump CRT Controller Registers
  2177. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  2178. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2179. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  2180. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2181. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2182. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2183. CRT,RUN,MODE_CONTROL,0x02
  2184. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2185. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2186. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2187. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2188. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2189. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2190. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2191. # Lock CRTC Reg 11 for compatibility
  2192. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2193. # Dump ENG Register
  2194. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2195. # Dump MISCOUT Register
  2196. DIR,RUN,MISC_WRITE,0xef
  2197. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2198. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2199. CLK_IND, RUN, FREQ_2, 0x61
  2200. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2201. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2202. CRT,RUN,LATCH_DATA, 0x00
  2203.  
  2204. [800,600,16,37,60]
  2205. # Unlock CRTC
  2206. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2207. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2208. CRT,RUN,REG_LOCK_1,0x48,0xA5
  2209. # Dump CRT Controller Registers
  2210. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  2211. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2212. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2213. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2214. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2215. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2216. CRT,RUN,MODE_CONTROL,0x02
  2217. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2218. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2219. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2220. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2221. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2222. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2223. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2224. # Lock CRTC Reg 11 for compatibility
  2225. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2226. # Dump ENG Register
  2227. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2228. # Dump MISCOUT Register
  2229. DIR,RUN,MISC_WRITE,0xef
  2230. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2231. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2232. CLK_IND, RUN, FREQ_2, 0x4D
  2233. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2234. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2235. CRT,RUN,LATCH_DATA, 0x00
  2236.  
  2237.  
  2238. [800,600,16,35,56]
  2239. # Unlock CRTC
  2240. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2241. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2242. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2243. # Dump CRT Controller Registers
  2244. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  2245. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2246. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  2247. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2248. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2249. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2250. CRT,RUN,MODE_CONTROL,0x02
  2251. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2252. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2253. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2254. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2255. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2256. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2257. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2258. # Lock CRTC Reg 11 for compatibility
  2259. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2260. # Dump ENG Register
  2261. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2262. # Dump MISCOUT Register
  2263. DIR,RUN,MISC_WRITE,0xef
  2264. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2265. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2266. CLK_IND, RUN, FREQ_2, 0x45
  2267. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2268. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2269. CRT,RUN,LATCH_DATA, 0x00
  2270.  
  2271. [800,600,8,75,120]
  2272. # Unlock CRTC
  2273. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2274. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2275. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2276. # Dump CRT Controller Registers
  2277. CRT,RUN,HORZ_TOTAL,0x39,0x31,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  2278. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2279. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  2280. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2281. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2282. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2283. CRT,RUN,MODE_CONTROL,0x02
  2284. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2285. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2286. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2287. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2288. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2289. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2290. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2291. # Lock CRTC Reg 11 for compatibility
  2292. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2293. # Dump ENG Register
  2294. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2295. # Dump MISCOUT Register
  2296. DIR,RUN,MISC_WRITE,0xef
  2297. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2298. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2299. CLK_IND, RUN, FREQ_2, 0x8a
  2300. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2301. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2302. CRT,RUN,LATCH_DATA, 0x08
  2303.  
  2304. [800,600,8,64,100]
  2305. # Unlock CRTC
  2306. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2307. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2308. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2309. # Dump CRT Controller Registers
  2310. CRT,RUN,HORZ_TOTAL,0x3a,0x31,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  2311. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2312. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  2313. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2314. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2315. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  2316. CRT,RUN,MODE_CONTROL,0x02
  2317. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2318. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2319. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2320. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2321. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2322. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2323. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2324. # Lock CRTC Reg 11 for compatibility
  2325. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2326. # Dump ENG Register
  2327. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2328. # Dump MISCOUT Register
  2329. DIR,RUN,MISC_WRITE,0xef
  2330. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2331. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2332. CLK_IND, RUN, FREQ_2, 0x7e
  2333. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2334. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2335. CRT,RUN,LATCH_DATA, 0x08
  2336.  
  2337. [800,600,8,56,90]
  2338. # Unlock CRTC
  2339. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2340. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2341. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2342. # Dump CRT Controller Registers
  2343. CRT,RUN,HORZ_TOTAL,0x3b,0x31,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  2344. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2345. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  2346. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2347. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2348. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2349. CRT,RUN,MODE_CONTROL,0x02
  2350. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2351. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2352. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2353. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2354. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2355. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2356. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2357. # Lock CRTC Reg 11 for compatibility
  2358. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2359. # Dump ENG Register
  2360. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2361. # Dump MISCOUT Register
  2362. DIR,RUN,MISC_WRITE,0xef
  2363. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2364. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2365. CLK_IND, RUN, FREQ_2, 0x70
  2366. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2367. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2368. CRT,RUN,LATCH_DATA, 0x08
  2369.  
  2370. [800,600,8,46,75]
  2371. # Unlock CRTC
  2372. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2373. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2374. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2375. # Dump CRT Controller Registers
  2376. CRT,RUN,HORZ_TOTAL,0x3d,0x31,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  2377. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2378. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  2379. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2380. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2381. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2382. CRT,RUN,MODE_CONTROL,0x02
  2383. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2384. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2385. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2386. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2387. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2388. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2389. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2390. # Lock CRTC Reg 11 for compatibility
  2391. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2392. # Dump ENG Register
  2393. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2394. # Dump MISCOUT Register
  2395. DIR,RUN,MISC_WRITE,0xef
  2396. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2397. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2398. CLK_IND, RUN, FREQ_2, 0x60
  2399. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2400. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2401. CRT,RUN,LATCH_DATA, 0x08
  2402.  
  2403. [800,600,8,48,72]
  2404. # Unlock CRTC
  2405. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2406. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2407. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2408. # Dump CRT Controller Registers
  2409. CRT,RUN,HORZ_TOTAL,0x3c,0x31,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  2410. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2411. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  2412. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2413. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2414. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2415. CRT,RUN,MODE_CONTROL,0x02
  2416. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2417. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2418. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2419. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2420. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2421. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2422. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2423. # Lock CRTC Reg 11 for compatibility
  2424. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2425. # Dump ENG Register
  2426. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2427. # Dump MISCOUT Register
  2428. DIR,RUN,MISC_WRITE,0xef
  2429. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2430. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2431. CLK_IND, RUN, FREQ_2, 0x61
  2432. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2433. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2434. CRT,RUN,LATCH_DATA, 0x08
  2435.  
  2436. [800,600,8,37,60]
  2437. # Unlock CRTC
  2438. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2439. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2440. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2441. # Dump CRT Controller Registers
  2442. CRT,RUN,HORZ_TOTAL,0x3d,0x31,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  2443. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2444. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2445. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2446. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2447. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2448. CRT,RUN,MODE_CONTROL,0x02
  2449. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2450. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2451. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2452. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2453. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2454. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2455. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2456. # Lock CRTC Reg 11 for compatibility
  2457. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2458. # Dump ENG Register
  2459. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2460. # Dump MISCOUT Register
  2461. DIR,RUN,MISC_WRITE,0xef
  2462. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2463. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2464. CLK_IND, RUN, FREQ_2, 0x4D
  2465. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2466. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2467. CRT,RUN,LATCH_DATA, 0x08
  2468.  
  2469. [800,600,8,35,56]
  2470. # Unlock CRTC
  2471. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2472. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2473. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2474. # Dump CRT Controller Registers
  2475. CRT,RUN,HORZ_TOTAL,0x3b,0x31,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  2476. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2477. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  2478. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2479. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2480. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2481. CRT,RUN,MODE_CONTROL,0x02
  2482. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2483. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2484. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2485. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2486. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2487. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2488. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2489. # Lock CRTC Reg 11 for compatibility
  2490. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2491. # Dump ENG Register
  2492. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2493. # Dump MISCOUT Register
  2494. DIR,RUN,MISC_WRITE,0xef
  2495. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2496. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2497. CLK_IND, RUN, FREQ_2, 0x45
  2498. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2499. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2500. CRT,RUN,LATCH_DATA, 0x08
  2501.  
  2502. [640,480,24,64,120]
  2503. # Unlock CRTC
  2504. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2505. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2506. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2507. # Dump CRT Controller Registers
  2508. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3e,0x04,0x12,0x3e,0x00,0x40
  2509. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2510. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  2511. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0c,0xab,0xff
  2512. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2513. CRT,RUN,MISC_1,0x15,0x58,0x24,0x11
  2514. CRT,RUN,MODE_CONTROL,0x02
  2515. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2516. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2517. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2518. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2519. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2520. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2521. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2522. # Lock CRTC Reg 11 for compatibility
  2523. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2524. # Dump ENG Register
  2525. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2526. # Dump MISCOUT Register
  2527. DIR,RUN,MISC_WRITE,0xef
  2528. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2529. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2530. CLK_IND, RUN, FREQ_2, 0x67
  2531. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2532. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2533. CRT,RUN,LATCH_DATA, 0x00
  2534.  
  2535.  
  2536. [640,480,24,52,100]
  2537. # Unlock CRTC
  2538. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2539. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2540. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2541. # Dump CRT Controller Registers
  2542. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8b,0x3d,0x03,0x06,0x3e,0x00,0x40
  2543. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2544. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  2545. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x00,0xab,0xff
  2546. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2547. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2548. CRT,RUN,MODE_CONTROL,0x02
  2549. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2550. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2551. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2552. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2553. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2554. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2555. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2556. # Lock CRTC Reg 11 for compatibility
  2557. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2558. # Dump ENG Register
  2559. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2560. # Dump MISCOUT Register
  2561. DIR,RUN,MISC_WRITE,0xef
  2562. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2563. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2564. CLK_IND, RUN, FREQ_2, 0x50
  2565. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2566. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2567. CRT,RUN,LATCH_DATA, 0x00
  2568.  
  2569. [640,480,24,48,90]
  2570. # Unlock CRTC
  2571. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2572. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2573. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2574. # Dump CRT Controller Registers
  2575. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3d,0x03,0x14,0x3e,0x00,0x40
  2576. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2577. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  2578. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  2579. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2580. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2581. CRT,RUN,MODE_CONTROL,0x02
  2582. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2583. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2584. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2585. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2586. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2587. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2588. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2589. # Lock CRTC Reg 11 for compatibility
  2590. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2591. # Dump ENG Register
  2592. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2593. # Dump MISCOUT Register
  2594. DIR,RUN,MISC_WRITE,0xef
  2595. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2596. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2597. CLK_IND, RUN, FREQ_2, 0x4d
  2598. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2599. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2600. CRT,RUN,LATCH_DATA, 0x00
  2601.  
  2602.  
  2603. [640,480,24,37,75]
  2604. # Unlock CRTC
  2605. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2606. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2607. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2608. # Dump CRT Controller Registers
  2609. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8d,0x40,0x04,0xf7,0x1f,0x00,0x40
  2610. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2611. CRT,RUN,VERT_RETRACE_START,0xe6,0x09,0xdf
  2612. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf7,0xab,0xff
  2613. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2614. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2615. CRT,RUN,MODE_CONTROL,0x02
  2616. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2617. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2618. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2619. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2620. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2621. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2622. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2623. # Lock CRTC Reg 11 for compatibility
  2624. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2625. # Dump ENG Register
  2626. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2627. # Dump MISCOUT Register
  2628. DIR,RUN,MISC_WRITE,0xef
  2629. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2630. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2631. CLK_IND, RUN, FREQ_2, 0x3a
  2632. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2633. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2634. CRT,RUN,LATCH_DATA, 0x00
  2635.  
  2636. [640,480,24,37,72]
  2637. # Unlock CRTC
  2638. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2639. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2640. CRT,RUN,REG_LOCK_1,0x48,0xa0
  2641. # Dump CRT Controller Registers
  2642. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8d,0x3e,0x02,0x06,0x3e,0x00,0x40
  2643. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2644. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  2645. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  2646. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2647. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2648. CRT,RUN,MODE_CONTROL,0x02
  2649. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2650. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2651. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2652. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2653. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2654. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2655. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2656. # Lock CRTC Reg 11 for compatibility
  2657. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2658. # Dump ENG Register
  2659. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2660. # Dump MISCOUT Register
  2661. DIR,RUN,MISC_WRITE,0xef
  2662. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2663. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2664. CLK_IND, RUN, FREQ_2, 0x3a
  2665. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2666. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2667. CRT,RUN,LATCH_DATA, 0x00
  2668.  
  2669. [640,480,24,31,60]
  2670. # Unlock CRTC
  2671. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2672. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2673. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2674. # Dump CRT Controller Registers
  2675. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8a,0x3d,0x06,0x0b,0x3e,0x00,0x40
  2676. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2677. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  2678. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  2679. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2680. CRT,RUN,MISC_1,0x15,0x41,0x24,0x11
  2681. CRT,RUN,MODE_CONTROL,0x02
  2682. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2683. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x32
  2684. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2685. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2686. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2687. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2688. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2689. # Lock CRTC Reg 11 for compatibility
  2690. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2691. # Dump ENG Register
  2692. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2693. # Dump MISCOUT Register
  2694. DIR,RUN,MISC_WRITE,0xef
  2695. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2696. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2697. CLK_IND, RUN, FREQ_2, 0x21
  2698. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2699. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2700. CRT,RUN,LATCH_DATA, 0x00
  2701.  
  2702. [640,480,32,64,120]
  2703. # Unlock CRTC
  2704. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2705. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2706. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2707. # Dump CRT Controller Registers
  2708. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  2709. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2710. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  2711. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  2712. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2713. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2714. CRT,RUN,MODE_CONTROL,0x02
  2715. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2716. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2717. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2718. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2719. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2720. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2721. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2722. # Lock CRTC Reg 11 for compatibility
  2723. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2724. # Dump ENG Register
  2725. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2726. # Dump MISCOUT Register
  2727. DIR,RUN,MISC_WRITE,0xef
  2728. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2729. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2730. CLK_IND, RUN, FREQ_2, 0x67
  2731. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2732. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2733. CRT,RUN,LATCH_DATA, 0x00
  2734.  
  2735. [640,480,32,52,100]
  2736. # Unlock CRTC
  2737. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2738. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2739. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2740. # Dump CRT Controller Registers
  2741. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  2742. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2743. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  2744. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  2745. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2746. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  2747. CRT,RUN,MODE_CONTROL,0x02
  2748. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2749. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2750. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2751. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2752. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2753. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2754. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2755. # Lock CRTC Reg 11 for compatibility
  2756. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2757. # Dump ENG Register
  2758. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2759. # Dump MISCOUT Register
  2760. DIR,RUN,MISC_WRITE,0xef
  2761. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2762. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2763. CLK_IND, RUN, FREQ_2, 0x50
  2764. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2765. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2766. CRT,RUN,LATCH_DATA, 0x00
  2767.  
  2768. [640,480,32,48,90]
  2769. # Unlock CRTC
  2770. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2771. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2772. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2773. # Dump CRT Controller Registers
  2774. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  2775. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2776. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  2777. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  2778. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2779. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2780. CRT,RUN,MODE_CONTROL,0x02
  2781. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2782. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2783. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2784. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2785. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2786. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2787. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2788. # Lock CRTC Reg 11 for compatibility
  2789. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2790. # Dump ENG Register
  2791. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2792. # Dump MISCOUT Register
  2793. DIR,RUN,MISC_WRITE,0xef
  2794. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2795. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2796. CLK_IND, RUN, FREQ_2, 0x4d
  2797. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2798. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2799. CRT,RUN,LATCH_DATA, 0x00
  2800.  
  2801. [640,480,32,37,75]
  2802. # Unlock CRTC
  2803. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2804. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2805. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2806. # Dump CRT Controller Registers
  2807. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  2808. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2809. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  2810. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  2811. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2812. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2813. CRT,RUN,MODE_CONTROL,0x02
  2814. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2815. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2816. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2817. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2818. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2819. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2820. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2821. # Lock CRTC Reg 11 for compatibility
  2822. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2823. # Dump ENG Register
  2824. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2825. # Dump MISCOUT Register
  2826. DIR,RUN,MISC_WRITE,0xef
  2827. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2828. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2829. CLK_IND, RUN, FREQ_2, 0x3a
  2830. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2831. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2832. CRT,RUN,LATCH_DATA, 0x00
  2833.  
  2834. [640,480,32,37,72]
  2835. # Unlock CRTC
  2836. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2837. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2838. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2839. # Dump CRT Controller Registers
  2840. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  2841. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2842. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  2843. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  2844. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2845. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2846. CRT,RUN,MODE_CONTROL,0x02
  2847. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2848. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2849. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2850. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2851. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2852. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2853. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2854. # Lock CRTC Reg 11 for compatibility
  2855. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2856. # Dump ENG Register
  2857. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2858. # Dump MISCOUT Register
  2859. DIR,RUN,MISC_WRITE,0xef
  2860. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2861. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2862. CLK_IND, RUN, FREQ_2, 0x3a
  2863. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2864. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2865. CRT,RUN,LATCH_DATA, 0x00
  2866.  
  2867. [640,480,32,31,60]
  2868. # Unlock CRTC
  2869. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2870. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2871. CRT,RUN,REG_LOCK_1,0x48,0xA5
  2872. # Dump CRT Controller Registers
  2873. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  2874. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2875. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  2876. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  2877. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2878. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2879. CRT,RUN,MODE_CONTROL,0x02
  2880. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2881. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2882. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2883. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2884. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2885. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2886. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2887. # Lock CRTC Reg 11 for compatibility
  2888. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2889. # Dump ENG Register
  2890. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2891. # Dump MISCOUT Register
  2892. DIR,RUN,MISC_WRITE,0xef
  2893. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2894. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2895. CLK_IND, RUN, FREQ_2, 0x21
  2896. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2897. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2898. CRT,RUN,LATCH_DATA, 0x00
  2899.  
  2900. [640,480,16,64,120]
  2901. # Unlock CRTC
  2902. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2903. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2904. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2905. # Dump CRT Controller Registers
  2906. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  2907. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2908. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  2909. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  2910. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2911. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2912. CRT,RUN,MODE_CONTROL,0x02
  2913. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2914. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2915. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2916. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2917. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2918. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2919. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2920. # Lock CRTC Reg 11 for compatibility
  2921. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2922. # Dump ENG Register
  2923. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2924. # Dump MISCOUT Register
  2925. DIR,RUN,MISC_WRITE,0xef
  2926. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2927. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2928. CLK_IND, RUN, FREQ_2, 0x67
  2929. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2930. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2931. CRT,RUN,LATCH_DATA, 0x00
  2932.  
  2933. [640,480,16,52,100]
  2934. # Unlock CRTC
  2935. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2936. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2937. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2938. # Dump CRT Controller Registers
  2939. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  2940. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2941. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  2942. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  2943. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2944. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  2945. CRT,RUN,MODE_CONTROL,0x02
  2946. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2947. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2948. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2949. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2950. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2951. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2952. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2953. # Lock CRTC Reg 11 for compatibility
  2954. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2955. # Dump ENG Register
  2956. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2957. # Dump MISCOUT Register
  2958. DIR,RUN,MISC_WRITE,0xef
  2959. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2960. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2961. CLK_IND, RUN, FREQ_2, 0x50
  2962. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2963. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2964. CRT,RUN,LATCH_DATA, 0x00
  2965.  
  2966. [640,480,16,48,90]
  2967. # Unlock CRTC
  2968. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2969. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2970. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2971. # Dump CRT Controller Registers
  2972. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  2973. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2974. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  2975. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  2976. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2977. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2978. CRT,RUN,MODE_CONTROL,0x02
  2979. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2980. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  2981. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2982. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2983. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2984. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2985. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2986. # Lock CRTC Reg 11 for compatibility
  2987. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2988. # Dump ENG Register
  2989. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2990. # Dump MISCOUT Register
  2991. DIR,RUN,MISC_WRITE,0xef
  2992. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2993. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2994. CLK_IND, RUN, FREQ_2, 0x4d
  2995. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2996. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2997. CRT,RUN,LATCH_DATA, 0x00
  2998.  
  2999. [640,480,16,37,75]
  3000. # Unlock CRTC
  3001. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3002. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3003. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3004. # Dump CRT Controller Registers
  3005. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  3006. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3007. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  3008. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  3009. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3010. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3011. CRT,RUN,MODE_CONTROL,0x02
  3012. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3013. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3014. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3015. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3016. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3017. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3018. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3019. # Lock CRTC Reg 11 for compatibility
  3020. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3021. # Dump ENG Register
  3022. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3023. # Dump MISCOUT Register
  3024. DIR,RUN,MISC_WRITE,0xef
  3025. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3026. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3027. CLK_IND, RUN, FREQ_2, 0x3a
  3028. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3029. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3030. CRT,RUN,LATCH_DATA, 0x00
  3031.  
  3032. [640,480,16,37,72]
  3033. # Unlock CRTC
  3034. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3035. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3036. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3037. # Dump CRT Controller Registers
  3038. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  3039. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3040. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  3041. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  3042. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3043. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3044. CRT,RUN,MODE_CONTROL,0x02
  3045. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3046. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3047. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3048. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3049. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3050. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3051. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3052. # Lock CRTC Reg 11 for compatibility
  3053. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3054. # Dump ENG Register
  3055. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3056. # Dump MISCOUT Register
  3057. DIR,RUN,MISC_WRITE,0xef
  3058. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3059. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3060. CLK_IND, RUN, FREQ_2, 0x3a
  3061. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3062. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3063. CRT,RUN,LATCH_DATA, 0x00
  3064.  
  3065. [640,480,16,31,60]
  3066. # Unlock CRTC
  3067. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3068. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3069. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3070. # Dump CRT Controller Registers
  3071. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  3072. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3073. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  3074. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  3075. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3076. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3077. CRT,RUN,MODE_CONTROL,0x02
  3078. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3079. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3080. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3081. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3082. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3083. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3084. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3085. # Lock CRTC Reg 11 for compatibility
  3086. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3087. # Dump ENG Register
  3088. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3089. # Dump MISCOUT Register
  3090. DIR,RUN,MISC_WRITE,0xef
  3091. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3092. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3093. CLK_IND, RUN, FREQ_2, 0x21
  3094. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3095. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3096. CRT,RUN,LATCH_DATA, 0x00
  3097.  
  3098. [640,480,8,64,120]
  3099. # Unlock CRTC
  3100. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3101. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3102. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3103. # Dump CRT Controller Registers
  3104. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3105. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3106. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  3107. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  3108. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3109. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3110. CRT,RUN,MODE_CONTROL,0x02
  3111. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3112. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3113. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3114. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3115. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3116. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3117. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3118. # Lock CRTC Reg 11 for compatibility
  3119. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3120. # Dump ENG Register
  3121. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3122. # Dump MISCOUT Register
  3123. DIR,RUN,MISC_WRITE,0xef
  3124. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3125. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3126. CLK_IND, RUN, FREQ_2, 0x67
  3127. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3128. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3129. CRT,RUN,LATCH_DATA, 0x08
  3130.  
  3131. [640,480,8,52,100]
  3132. # Unlock CRTC
  3133. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3134. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3135. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3136. # Dump CRT Controller Registers
  3137. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  3138. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3139. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  3140. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  3141. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3142. CRT,RUN,MISC_1,0x15,0x28,0x40,0x11
  3143. CRT,RUN,MODE_CONTROL,0x02
  3144. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3145. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3146. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3147. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3148. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3149. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3150. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3151. # Lock CRTC Reg 11 for compatibility
  3152. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3153. # Dump ENG Register
  3154. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3155. # Dump MISCOUT Register
  3156. DIR,RUN,MISC_WRITE,0xef
  3157. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3158. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3159. CLK_IND, RUN, FREQ_2, 0x50
  3160. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3161. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3162. CRT,RUN,LATCH_DATA, 0x08
  3163.  
  3164. [640,480,8,48,90]
  3165. # Unlock CRTC
  3166. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3167. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3168. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3169. # Dump CRT Controller Registers
  3170. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3171. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3172. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  3173. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  3174. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3175. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3176. CRT,RUN,MODE_CONTROL,0x02
  3177. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3178. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3179. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3180. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3181. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3182. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3183. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3184. # Lock CRTC Reg 11 for compatibility
  3185. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3186. # Dump ENG Register
  3187. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3188. # Dump MISCOUT Register
  3189. DIR,RUN,MISC_WRITE,0xef
  3190. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3191. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3192. CLK_IND, RUN, FREQ_2, 0x4d
  3193. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3194. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3195. CRT,RUN,LATCH_DATA, 0x08
  3196.  
  3197. [640,480,8,37,75]
  3198. # Unlock CRTC
  3199. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3200. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3201. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3202. # Dump CRT Controller Registers
  3203. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  3204. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3205. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  3206. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  3207. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3208. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3209. CRT,RUN,MODE_CONTROL,0x02
  3210. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3211. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3212. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3213. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3214. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3215. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3216. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3217. # Lock CRTC Reg 11 for compatibility
  3218. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3219. # Dump ENG Register
  3220. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3221. # Dump MISCOUT Register
  3222. DIR,RUN,MISC_WRITE,0xef
  3223. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3224. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3225. CLK_IND, RUN, FREQ_2, 0x3a
  3226. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3227. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3228. CRT,RUN,LATCH_DATA, 0x08
  3229.  
  3230. [640,480,8,37,72]
  3231. # Unlock CRTC
  3232. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3233. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3234. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3235. # Dump CRT Controller Registers
  3236. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  3237. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3238. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  3239. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  3240. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3241. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3242. CRT,RUN,MODE_CONTROL,0x02
  3243. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3244. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3245. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3246. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3247. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3248. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3249. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3250. # Lock CRTC Reg 11 for compatibility
  3251. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3252. # Dump ENG Register
  3253. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3254. # Dump MISCOUT Register
  3255. DIR,RUN,MISC_WRITE,0xef
  3256. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3257. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3258. CLK_IND, RUN, FREQ_2, 0x3a
  3259. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3260. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3261. CRT,RUN,LATCH_DATA, 0x08
  3262.  
  3263. [640,480,8,31,60]
  3264. # Unlock CRTC
  3265. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3266. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3267. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3268. # Dump CRT Controller Registers
  3269. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  3270. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3271. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  3272. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  3273. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3274. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3275. CRT,RUN,MODE_CONTROL,0x02
  3276. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3277. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x02
  3278. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3279. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3280. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3281. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3282. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3283. # Lock CRTC Reg 11 for compatibility
  3284. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3285. # Dump ENG Register
  3286. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3287. # Dump MISCOUT Register
  3288. DIR,RUN,MISC_WRITE,0xef
  3289. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3290. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3291. CLK_IND, RUN, FREQ_2, 0x21
  3292. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3293. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3294. CRT,RUN,LATCH_DATA, 0x08
  3295.  
  3296.  
  3297.  
  3298.  
  3299.  
  3300.  
  3301.